In the semiconductor industry, the minimum feature sizes of microelectronic devices are approaching the deep sub-micron regime to meet the demand for faster, lower power microprocessors and digital circuits. In the manufacturing of a trench capacitor for a dynamic random access memory (DRAM) device, a deep trench (DT) is etched several microns (μm) into a silicon substrate. During manufacturing of a deep trench capacitor, a dielectric film, such as doped silicon dioxide film (e.g., arsenic-doped silicon dioxide, also referred to as arsenosilicate glass (ASG)), is deposited on the sidewalls of the trench, in order to provide out-diffusion of the dopant (e.g., arsenic, As) from the doped dielectric film into the sidewalls of the silicon trench to form one plate of the capacitor.
In current trench capacitor technology, the width of the trench can be about 0.2 microns, or less, and the trench depth to diameter aspect ratio can be as great as about 50:1, or even greater. Due to these aggressive trench dimensions, it can be difficult to process films located in the trench. In addition to utilizing a trench with straight vertical sidewalls, current trench capacitor technology may use a “bottle-shaped” trench, in which the bottom portion of the trench is etched to be wider than the top portion of the trench, in order to increase the capacitor surface area. This presents further difficulties for processing films located in the trench.